74LS02 = Quad 2-input NOR gates.
+----------+ +-----------+ ___
/1Y |1 +--+ 14| VCC | A | B |/Y | /Y = A+B
1A |2 13| /4Y |---+---+---|
1B |3 12| 4B | 0 | 0 | 1 |
/2Y |4 74 11| 4A | 0 | 1 | 0 |
2A |5 LS 10| /3Y | 1 | 0 | 0 |
2B |6 02 9| 3B | 1 | 1 | 0 |
GND |7 8| 3A +-----------+
+----------+
74LS138 = 1 of 8 inverting decoder/demultiplexer.
+----------+ +-----------------------------------------+
S0 |1 +--+ 16| VCC |EN1|/EN2|/EN3| S2| S1| S0|/Y0|/Y1|...|/Y7|
S1 |2 15| /Y0 |---+----+----+---+---+---+---+---+---+---|
S2 |3 14| /Y1 | 0 | X | X | X | X | X | 1 | 1 | 1 | 1 |
/EN3 |4 74 13| /Y2 | 1 | 1 | X | X | X | X | 1 | 1 | 1 | 1 |
/EN2 |5 LS 12| /Y3 | 1 | 0 | 1 | X | X | X | 1 | 1 | 1 | 1 |
EN1 |6 138 11| /Y4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 |
/Y7 |7 10| /Y5 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 |
GND |8 9| /Y6 | 1 | 0 | 0 | . | . | . | 1 | 1 | . | 1 |
+----------+ | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 |
+-----------------------------------------+
74LS244 = Dual 4-bit 3-state noninverting buffer/line driver.
+----------+
/1OE |1 +--+ 20| VCC
1A1 |2 19| /2OE
2Y4 |3 18| 1Y1
1A2 |4 17| 2A4
2Y3 |5 74 16| 1Y2
1A3 |6 LS 15| 2A3
2Y2 |7 244 14| 1Y3
1A4 |8 13| 2A2
2Y1 |9 12| 1Y4
GND |10 11| 2A1
+----------+
note that in the above: A means input and Y means output
74LS373 = 8 bit 3state transparent latch.
+----------+ +---------------+
/OE |1 +--+ 20| VCC |/OE| LE| D | Q |
Q1 |2 19| Q8 |---+---+---+---|
D1 |3 18| D8 | 1 | X | X | Z |
D2 |4 17| D7 | 0 | 0 | X | - |
Q2 |5 74 16| Q7 | 0 | 1 | 0 | 0 |
Q3 |6 LS 15| Q6 | 0 | 1 | 1 | 1 |
D3 |7 373 14| D6 +---------------+
D4 |8 13| D5
Q4 |9 12| Q5
GND |10 11| LE
+----------+