Pipelining (pipeline processing) summary and conclusions:
- technique used in advanced microprocessors
- microprocessor begins execution of a second instruction
before a first has been finished.
everyday example of pipelining: doing laundry (3 stage pipeline)
(note that most pipelines have 5 stages, and sometimes up to 8 as in the
R4000, rather than 3, but this example provides the general idea)
preferably the three stages of the pipeline should take approximately the
same time (e.g. same number of clock cycles).
- place load in washing machine
- transfer to dryer
- place another load in washing machine
- when first load dry, fold and iron while second and third loads are
still being processed.
for example, if dryer takes substantially longer than washer, it creates
this creates an incentive for manufacturer to make
faster dryers, but less incentive for speeding up washers.
market forces tend toward creating components that function like a RISC
pipelining in nonRISC microprocessors
- pipelining originally a feature of RISC microprocessors
- pipelining now common in pentium and other nonRISC microprocessors.
(pentium pipelining simultaneously executes up to 6 instructions)
example of another form of pipelining: pipeline SRAM cache for DRAM
- memory loads requested contents into SRAM cache
- then immediately starts to fetch contents of next memory location
- two stage pipeline
- data read or written to SRAM in one stage
- data read from or written to memory in the other stage
again, another example of nonRISC pipelining
a 6502 microprocessor has a throughput approximately equal to an 8080
processor running at 4 times the clock speed.
this was due to the pipelined architecture of the 6502 versus
the non-pipelined 8080.
EYE86 David Eyes, Ron Licht Programming the 65816 1986, Brady Book, p 40-1.
paraphrased from Tony Wesley firstname.lastname@example.org
NOT ALL PIPELINED PROCESSORS ARE RISC